Great Opening with Service based company for Verification Engineer:
Exp : 5+ Years
- 5-10years, equivalent experience in ASIC design and verification.
- Familiar with System Verilog Assertions, Code and Functional Coverage and Formal verification techniques.
- Experience in verifying designs at system level and block level using constrained random verification.
- Expert in System Verilog and OVM/UVM based verification.
- Strong experience in ASIC design verification flows and DV methodologies.
- Expert in coding SV Testbench, drivers, monitors, scoreboards, checkers
- Highly motivated and be able to work both independently and as a member of team.
- Strong and independent design debugging capability.
- Strong programming and scripting language capability.
- Expert in using verification tools like VCS, IUS, modelsim, Debussy etc.
If interested contact 9148661003/ Mail to email@example.com
Salary: Not Disclosed by Recruiter
Role Category:Programming & Design
Desired Candidate Profile
ACZ Global Private Limited
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